Vijay D'Silva

Vijay Victor D'Silva

Doctoral Student
Student, Magdalen College

Room Room 446, Wolfson Building, Parks Road, Oxford OX1 3QD

interests

I am interested in automata theory, logic and program correctness. My current infatuation is abstract interpretation and termination of static analyzers. A marriage of model checking and abstract interpretation is on the cards. In the past, I have worked on the design and analysis of synchronous bus protocols.

biography

B. Tech (2002), IIT Bombay. Dipl. Inf. (2006), University of Zurich.

selected publications (View all)

Interpolant Strength

Vijay D'Silva et al.

In Proceedings of the International Conference on Verification, Model Checking, and Abstract Interpretation (VMCAI) January 2010.

Details | BibTeX

Fixed Points in Multi-Cycle Path Detection

Vijay D'Silva, Daniel Kroening

In Bashir Al-Hashimi, editor, Proceedings of the Conference on Design Automation and Test in Europe (DATE) IEEE, 2009.

Details | BibTeX

Provably correct on-chip communication: A formal approach to automatic protocol converter synthesis

Karin Avnit et al.

Transaction on Design Automation of Electronic Systems (TODAES), Vol. 14, No. 2, pages 1—41. March 2009.

Details | BibTeX | Link | DOI (10.1145/1497561.1497562)

info

themes	Verification
activities	Software Model Checking
projects	Generalisation Operators for Abstraction-Refinement
supervisor	Daniel Kroening