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Vijay D'Silva: Publications
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[1]
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Interpolant Strength
Vijay D'Silva et al.
In Proceedings of the International Conference on Verification, Model Checking, and Abstract Interpretation (VMCAI) Vol. 5944 of Lecture Notes in Computer Science. Springer, January 2010.
Extended version available as technical report.
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[2]
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Fixed Points in Multi-Cycle Path Detection
Vijay D'Silva, Daniel Kroening
In Bashir Al-Hashimi, editor, Proceedings of the Conference on Design Automation and Test in Europe (DATE) IEEE, 2009.
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[3]
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Provably correct on-chip communication: A formal approach to automatic protocol converter synthesis
Karin Avnit et al.
Transaction on Design Automation of Electronic Systems (TODAES), Vol. 14, No. 2, pages 1—41. March 2009.
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DOI (10.1145/1497561.1497562)
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[4]
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Tales from Verification History
Vijay D'Silva
2009.
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[5]
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A Survey of Automated Techniques for Formal Software Verification
Vijay D'Silva, Daniel Kroening and Georg Weissenbacher
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 27, No. 7, pages 1165-1178. July 2008.
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DOI (10.1109/TCAD.2008.923410)
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[6]
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A Formal Approach To The Protocol Converter Problem
Karin Avnit et al.
In Zebo Peng, editor, Proceedings of the Conference on Design, Automation and Test in Europe (DATE) pages 294—299. ACM/IEEE, March 2008.
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DOI (10.1145/1403375.1403447)
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[7]
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Restructuring Resolution Refutations for Interpolation
Vijay D'Silva et al.
October 2008.
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[8]
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Approximation Refinement for Interpolation-Based Model Checking
Vijay D'Silva, Mitra Purandare and Daniel Kroening
In Francesco Logozzo, Doron Peled and Lenore D. Zuck, editors, Proceedings of the International Conference on Verification, Model Checking, and Abstract Interpretation (VMCAI) Vol. 4905 of Lecture Notes in Computer Science, pages 68—82. Heidelberg, Germany. January 2008. Springer.
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DOI (10.1007/978-3-540-78163-9)
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[9]
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Existential abstractions for distributed reactive systems via syntactic transformations
Vijay D'Silva, Sampada Sonalkar and S. Ramesh
In Christoph M. Kirsch, Reinhard Wilhelm, editors, Proceedings of the 7th ACM & IEEE international conference on Embedded software (EMSOFT) pages 240 - 248. September 2007.
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DOI (10.1145/1289927.1289965)
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[10]
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Synchronous protocol automata: a framework for modelling and verification of SoC communication architectures
Vijay D'Silva, S. Ramesh and Arcot Sowmya
IEE Proceedings - Computers and Digital Techniques, Vol. 152, No. 1, pages 20—27. January 2005.
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DOI (10.1049/ip-cdt:20045097)
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[11]
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A Toolset for Modelling and Verification of GALS Systems
S. Ramesh et al.
In Rajeev Alur, Doron Peled, editors, 16th International Conference on Computer Aided Verification (CAV) Vol. 3114 of Lecture Notes in Computer Science, pages 506-509. Springer, July 2004.
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[12]
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Synchronous Protocol Automata: A Framework for Modelling and Verification of SoC Communication Architectures
Vijay D'Silva, S. Ramesh and Arcot Sowmya
In Georges Gielen, editor, Proceedings of the Conference on Design Automation and Test in Europe (DATE) Vol. 1, pages 10390—10395. ACM/IEEE, February 2004.
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